The present invention relates to a complementary logic circuit, more precisely, to a complementary IC (Integrated Circuit) which enables high speed switching of signals at high current level without increasing power consumption . The circuit is realized by combining MIS (Metal Insulator Semiconductor) transistors and vertical FETs (Field Effect Transistors).
A complementary MIS (C-MIS) type logic circuit is widely used as a very low power consumption circuit, but it has the disadvantages of rather low switching speed and rather low power handling capacity. Therefore, it was difficult to drive large scale and complicated logic circuits by C-MIS.
There were attempts to overcome such defects of complementary MIS circuits by combining the FETs with bipolar transistors, which have high speed and high power handling capacity. But there appeared other difficulties on such improved circuits, as will be described later, the improvement was inadequate. Moreover, these improvements increased the steps of fabrication, and imposed undesirable effects on the yield, cost and reliability of the devices.